FOR IMMEDIATE RELEASE
June 28, 2006
For More Information, Contact:
System Planning Corporation
James M. Kudla
703/351-8238
Cell: 571-217-3633
jkudla@sysplan.com
System Planning Corporation Analog/Digital Data Recorder Helps Streamline Radar Algorithm
Development Project
Arlington, Va. (June 28) -- System Planning Corporation (SPC) today announced that its
Radar Physics Group is culminating a three-year algorithm development project that
leverages SPC’s Analog/Digital Data Recorder (ADDR) technology to streamline development
and testing of novel radar data processing techniques.
Throughout the project, SPC engineers took advantage of ADDR’s ability to integrate
recording capability into a real-time processing system. This allowed test personnel
to record live data without interfering with real-time tests during field operations. Access
in the lab to these real-world recorded data enabled SPC engineers to minimize costly time
in the field.
The ability to replay the recorded data permitted developers to parameterize algorithm
performance and quantitatively assess the effects of processing modifications. ADDR
technology dramatically increased the efficiency of the algorithm development project,
thereby providing substantial cost savings.
SPC’s ADDR is a highly flexible and scalable turn-key data recorder. The system can sustain
storage rates of up to 400MB/s per channel, with multi-channel configurations providing even
higher throughput. ADDR’s COTS-based architecture ensures a low-cost system, while the
PC-based design allows for maximum flexibility in the recording system’s configuration.
For more information about SPC’s Analog/Digital Data Recorder (ADDR) and its capabilities,
contact Mr. Gary Rubin, ADDR Program Manager at radar@sysplan.com or visit
http://www.sysplan.com/Radar/ADDR/.
-SPC-
